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_______________general description the MAX551/max552 are 12-bit, current-output, 4-quad- rant multiplying digital-to-analog converters (dacs). these devices are capable of providing unipolar or bipolar outputs when operating from either a single +5v (MAX551) or +3v (max552) power supply. an internal power-on-reset circuit clears all dac registers on power-up, setting the dac output voltage to 0v. the spi/qspi and microwire-compatible 3- wire serial interface saves board space and reduces power dissipation compared with parallel-interface devices. the MAX551/max552 feature double-buffered interface logic with a 12-bit input register and a 12-bit dac register. data in the dac register sets the dac output voltage. data is loaded into the input register through the serial interface. the load input transfers data from the input register to the dac register, updat- ing the dac output voltage. the MAX551/max552 are available in an 8-pin dip package or a space-saving 10-pin ?ax package. the ?ax package provides an asynchronous clear ( clr ) input that clears all dac registers when pulled to gnd, setting the output voltage to 0v. ________________________applications automatic calibration gain adjustment transducer drivers process-control i/o boards digitally controlled filters motion-controlled systems ?-controlled systems programmable amplifiers/attenuators ____________________________features single-supply operation: +4.5v to +5.25v (MAX551) +2.7v to +3.6v (max552) 12.5mhz 3-wire serial interface spi/qspi and microwire compatible power-on reset clears dac output to zero asynchronous clear input clears dac output to zero voltage mode or bipolar mode operation with a single power supply schmitt-trigger digital inputs for direct optocoupler interface 0.4a supply current 10-pin max package MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package ________________________________________________________________ maxim integrated products 1 1 2 3 4 5 10 9 8 7 6 rfb ref clr sclk v dd gnd agnd out MAX551 max552 max top view din load sclk din load 1 2 8 7 rfb ref gnd v dd out dip 3 4 6 5 MAX551 max552 19-1260; rev 1; 9/02 part MAX551 acpa MAX551bcpa MAX551acub 0? to +70? 0? to +70? 0? to +70? temp range pin- package 8 plastic dip 8 plastic dip 10 ?ax ______________ordering information ordering information continued at end of data sheet. spi and qspi are trademarks of motorola inc. microwire is a trademark of national semiconductor corp. MAX551bcub MAX551aepa MAX551bepa -40? to +85? -40? to +85? 0? to +70? 10 ?ax 8 plastic dip 8 plastic dip MAX551aeub -40? to +85? 10 ?ax MAX551beub -40? to +85? 10 ?ax linearity (lsb) ?/2 ? ?/2 ? ?/2 ? ?/2 ? _________________pin configurations 12-bit d/a converter rfb out agnd* clr* load v dd ref sclk gnd * max package only 12-bit dac register din r fb 12-bit shift register power-on reset MAX551 max552 ________________functional diagram for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics?ax551 (v dd = +4.5v to +5.25v, v ref = 5v, out = agnd = gnd, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd..............................................................................6v ref, rfb to gnd.................................................................?2v digital inputs (sclk, din, load , clr ) to gnd .....................................................................-0.3v to 6v out to gnd ...............................................-0.3v to (v dd + 0.3v) agnd to dgnd ..................................................................?.3v continuous power dissipation (t a = +70?) plastic dip (derate 9.09mw/? above +70?) .............727mw ?ax (derate 5.60mw/? above +70?) .....................444mw operating temperature ranges max55_ _c_ _......................................................0? to +70? max55_ _e_ _ ...................................................-40? to +85? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? v ref = 6v rms at 1khz, dac register loaded with all 1s v ref = 5v p-p at 10khz, dac register loaded with all 0s using internal feedback resistor (r fb ) (note 2) ? v dd = +5%, -10% t a = +25?, to 1/2lsb, out load is 100 ? ||13pf, dac register alternately loaded with 1s and 0s 10hz to 100khz, measured between rfb and out conditions nv/ hz 13 15 output noise-voltage density ? gain error lsb ?/2 inl db -85 thd total harmonic distortion mv p-p 0.3 1 ac feedthrough at out ? 0.08 1 ppm/? ?.2 ? gain tempco ( ? gain/ ? temp) ppm/% 2 psr power-supply rejection t s current settling time units min typ max symbol parameter MAX551a bits 12 n resolution MAX551b ? integral nonlinearity guaranteed monotonic over temperature MAX551a ?/2 dnl differential nonlinearity MAX551b ? MAX551a MAX551b using internal feedback resistor (r fb ) ? v ref = 0v, out load is 100 ? ||13pf, dac register alternately loaded with 1s and 0s digital-to-analog glitch nv-s 0.65 20 static performance dynamic performance (note 3) lsb lsb
MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package _______________________________________________________________________________________ 3 electrical characteristics?ax551 (continued) (v dd = +4.5v to +5.25v, v ref = 5v, out = agnd = gnd, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 1) clr dac register loaded with all 0s conditions ppm/? 6.5 ?5 ? ? i in v 0.8 v il na ?.15 ? out leakage current units min typ max symbol parameter v out = 0.31v p-p , r l = 50 ? , code = full-scale k ? 71115 r ref input resistance measured between ref and out khz 725 input resistance tempco bw reference -3db bandwidth t a = +25? t a = t min to t max code = full scale (note 2) code = zero scale (note 2) 20 30 pf 14 20 c out out capacitance v ih input high voltage v 2.4 load , clr , din, and sclk, v dd = 5v mv 156 hyst 18 100 sclk, load , din inputs at 0v or v dd (note 2) pf 8 input leakage current ? input low voltage input hysteresis v clr = v dd v clr = 0v inputs at 0v or v dd c in input capacitance ns 25 t ch sclk pulse width high ns 25 t cl sclk pulse width low ns 15 t ds din data to sclk setup ns 15 t dh din data to sclk hold ns 20 t ld load pulse width ns 0 t sl lsb sclk to load ns 15 t lc load high to sclk ns 20 t clr clr pulse width v 4.50 5.25 v dd supply voltage all digital inputs at v il or v ih, clr = v dd ma 0.5 1.5 i dd supply current all digital inputs at 0v or v dd, clr = v dd ? 0.4 5 reference input analog output digital inputs switching characteristics power supply
MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package 4 _______________________________________________________________________________________ electrical characteristics?ax552 (v dd = +2.7v to +3.6v, v ref = 2.5v, out = agnd = gnd, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 1) max552a v ref = 6v rms at 1khz, dac register loaded with all 1s v ref = 3v p-p at 10khz, dac register loaded with all 0s using internal feedback resistor (r fb ) (note 2) ? v dd = +20%, -10% t a = +25?, to 1/2lsb, out load is 100 ? ||13pf, dac register alternately loaded with 1s and 0s 10hz to 100khz, measured between rfb and out conditions nv/ hz 13 15 output noise-voltage density lsb ? gain error ?/2 inl db -85 thd total harmonic distortion mv p-p 0.2 0.6 ac feedthrough at out ? 0.12 1 ppm/? ?.3 ? gain tempco ( ? gain/ ? temp) ppm/% 1 psr power-supply rejection t s current settling time max552a v ref = 0v, out load is 100 ? ||13pf, dac register alternately loaded with 1s and 0s units min typ max symbol parameter guaranteed monotonic over temperature bits 12 n resolution max552a max552b ? ?/2 integral nonlinearity dnl differential nonlinearity max552b ? max552b using internal feedback resistor (r fb ) digital-to-analog glitch nv-s ? 0.6 20 measured between ref and out k ? 71115 r ref input resistance ppm/? 7.5 input resistance tempco v out = 0.31v p-p , r l = 50 ? , code = full-scale khz 725 bw reference -3db bandwidth dac register loaded with all 0s na ?.13 ? out leakage current code = zero code (note 2) pf 14 20 t a = +25? ?5 t a = t min to t max code = full scale (note 2) 20 30 c out out capacitance static performance dynamic performance (note 3) reference input analog output lsb lsb
MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package _______________________________________________________________________________________ 5 electrical characteristics?ax552 (continued) (v dd = +2.7v to +3.6v, v ref = 2.5v, vout = agnd = gnd, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) (note 1) clr v ih input high voltage v conditions 2.1 load , clr , din, and sclk, v dd = 3v mv 135 hyst input low voltage ns 12 75 v clr = 0v input hysteresis sclk, load , din inputs at 0v or v dd (note 2) pf 8 v clr = v dd input leakage current 40 ? t ch inputs at 0v or v dd c in input capacitance sclk pulse width high ns 40 t cl sclk pulse width low ns 15 t ds din data to sclk setup ns 15 t dh din data to sclk hold ns 30 t ld load pulse width ns 0 t sl lsb sclk to load ns 15 t lc load high to sclk ns ? ? i in 30 v 0.6 v il t clr clr pulse width v 2.7 3.6 v dd supply voltage units min typ max symbol parameter all digital inputs at v il or v ih, clr = v dd ma 0.1 0.5 i dd supply current all digital inputs at 0v or v dd, clr = v dd ? 0.07 5 digital inputs switching characteristics power supply note 1: agnd and clr are for ?ax only. note 2: guaranteed by design. not subject to production testing. note 3: parametric limits are provided for design guidance, and are not production tested.
MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package 6 _______________________________________________________________________________________ __________________________________________typical operating characteristics (t a = +25?, unless otherwise noted.) 0 -20 -100 0.001 0.01 1 MAX551 total harmonic distortion vs. frequency -40 -60 -80 MAX551/552 toc3 frequency (mhz) thd + n (db) 0.1 output amplifier = max4166 1st 5 harmonics v ref = 0.42v p-p , r l = 50 ? input code = all 1s 0 0.2 0.4 0.6 0.8 1.0 012345 supply current vs. logic input voltage MAX551/552 toc4 logic input voltage, v in (v) supply current (ma) v dd = 2.7v v dd = 3.3v v in at din, sclk, and load clr = v dd v dd = 5.0v -0.5 -0.2 -0.3 -0.4 0.1 0 -0.1 0.3 0.2 0.5 0.4 2.2 2.4 2.5 2.6 2.3 2.7 2.8 max552 dnl vs. reference voltage MAX551/max552 toc3a reference voltage (v) dnl (lsb) v dd = 3.6v -0.5 -0.2 -0.3 -0.4 0.1 0 -0.1 0.3 0.2 0.5 0.4 4.7 4.9 5.0 5.1 4.8 5.2 5.3 MAX551 inl vs. reference voltage MAX551/max552 toc1a reference voltage (v) inl (lsb) v dd = 5.25v -0.5 -0.2 -0.3 -0.4 0.1 0 -0.1 0.3 0.2 0.5 0.4 4.7 4.9 5.0 5.1 4.8 5.2 5.3 MAX551 dnl vs. reference voltage MAX551/max552 toc2a reference voltage (v) dnl (lsb) v dd = 5.25v -0.5 -0.2 -0.3 -0.4 0.1 0 -0.1 0.3 0.2 0.5 0.4 2.2 2.4 2.5 2.6 2.3 2.7 2.8 max552 inl vs. reference voltage MAX551/max5452 toc4a reference voltage (v) inl (lsb) v dd = 3.6v 3 2 1 0 -7 0.01 0.1 10 multiplying frequency response -6 -1 -2 -3 -4 -5 MAX551/552 toc2 frequency (mhz) gain (db) 1 MAX551 or max552 v ref = 0.31v p-p , r l = 50 ? input code = all 1s output amplifier = max4166 -50 -100 0.01 0.1 1 reference ac feedthrough vs. frequency max4551/552 toc1 frequency (mhz) reference ac feedthrough (db) -80 -90 -70 -60 MAX551 or max552 v ref = 0.31v p-p , r l = 50 ? input code = all 0s output amplifier = max4166
MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package _______________________________________________________________________________________ 7 ______________________________________________________________pin description pin name 1 1 out 2 agnd 2 3 gnd 6 7 sclk 5 6 din 4 5 load 3 4 v dd 8 10 rfb 7 9 ref 8 clr feedback resistor reference input clear dac input. clears the dac register. tie to v dd or float if not used. serial-clock input. the serial input data is clocked in on sclk? rising edge. serial-data input active-low load dac input. driving this asynchronous input low transfers the contents of the input register to the dac register. supply voltage digital ground. also analog ground for dip package. analog ground dac current output function max dip d1 d9 2r rrr r 2r 2r 2r 2r 2r agnd out v ref r fb * r fb * = r rfb d10 d11 (msb) do (lsb) figure 1. MAX551/max552 simplified circuit
MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package 8 _______________________________________________________________________________________ din sclk load bit 11 msb bit 0 lsb bit 10 bit 1 t ds t dh t ch 12 load serial data into input register 11 t cl t clr t sl t ld t lc clr figure 2. write-cycle timing diagram MAX551 max552 +5v (+3v) ( ) are for max552 v ref v dd r2 50 ? c1 15pf 2 3 v out 6 r1 100 ? din ref rfb out gnd agnd sclk load table 1. unipolar binary-code table for circuit of figure 3 digital input msb lsb analog output 1111 1111 1111 1000 0000 0000 0000 0000 0001 0000 0000 0000 0 ? ? ? ? ? ? ? v ref 4095 4096 ? ? ? ? ? ? ? =? v v ref ref 2048 4096 2 ? ? ? ? ? ? ? v ref 1 4096 figure 3. unipolar operation detailed description the MAX551/max552 digital-to-analog converter (dac) circuits consist of a laser-trimmed, thin-film r-2r resis- tor array with nmos current switches (figure 1). binary-weighted currents are switched to either out or agnd, depending on the status of each input data bit. although the currents at out and agnd depend on the digital input code, the sum of the two output cur- rents is always equal to the input current at ref. the output current (i out ) can be converted into a volt- age by adding an external output amplifier (figure 3). the ref input accepts a wide range of signals, includ- ing fixed and time-varying voltage or current inputs. if a current source is used at the reference input, use a low-tempco, external feedback resistor in place of the internal feedback resistor (r fb ) to minimize gain varia- tion with temperature. the internal feedback resistor (r fb ) is compensated with an nmos switch that matches the nmos switches used in the r-2r array, resulting in excellent supply rejection and gain-temperature coefficient. the out pin output capacitance (c out ) is code dependent. c out is typically 14 pf at 000hex and 20 pf at fffhex. serial interface the MAX551/max552 serial interface is compatible with the spi/qspi and microwire serial-interface standards. these devices accept serial clocks up to 12.5mhz (50% duty cycle). if the sclk input is not
symmetrical, then the clock signal used must meet the t ch and t cl requirements given in the electrical characteristics . figure 2 shows the MAX551/max552 timing diagram. the most significant bit (msb) is always loaded first on sclk? rising edge. when all data is shifted into the input register, the dac register is loaded by driving the load signal low. the dac register is transparent when load is low and latched when load is high. the MAX551/max552 digital inputs are compatible with cmos logic levels. the MAX551? inputs are also com- patible with ttl logic. unipolar operation figure 3 shows the MAX551/max552? basic applica- tion. this circuit is used for unipolar operation or 2- quadrant multiplication. the code table for this mode is given in table 1. note that the output? polarity is the opposite of the reference voltage polarity. in many applications the gain accuracy is sufficient and gain adjustment is not necessary. in these cases, resis- tors r1 and r2 in figure 3 can be omitted. if the gain is trimmed and the dac is operated over a wide tempera- ture range, use low-tempco (<300ppm/?) resistors for r1 and r2. capacitor c1 provides phase compensa- tion and reduces overshoot and ringing when fast amplifiers are used at the dac? output. bipolar operation figure 4 shows the MAX551/max552 operating in bipo- lar (or 4-quadrant multiplying) mode. matched resistors r3, r4, and r5 must be of the same material (prefer- ably metal film or wire-wound) for good temperature- tracking characteristics (<15ppm/?) and should match to 0.01% for 12-bit performance. the output code is offset binary, as listed in table 2. to adjust the circuit, load the dac with a code of 1000 0000 0000 and trim r1 for a 0v output. with r1 and r2 omitted, an alternative zero trim is needed to adjust the ratio of r3 and r4 for 0v out. trim full scale by loading the dac with all 0s or 1s and adjusting the v ref ampli- tude or varying r5 until the desired positive or negative output is obtained. in applications where gain trim is not required, omit resistors r1 and r2. if gain trim is desired and the dac is operated over a wide tempera- ture range, then low-tempco (<300ppm/?) resistors should be used. MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package _______________________________________________________________________________________ 9 table 2. offset binary-code table for circuit of figure 4 MAX551 max552 r3 10k ? c1 33pf +5v (+3v) v dd v ref rfb gnd sclk load din agnd ref out r2 50 ? r4 20k ? r1 100 ? r5 20k ? v out ( ) are for max552 digital input msb lsb analog output 1111 1111 1111 1000 0000 0001 1000 0000 0000 0111 1111 1111 figure 4. bipolar operation 0000 0000 0000 + ? ? ? ? ? ? v ref 2047 2048 + ? ? ? ? ? ? v ref 1 2048 0 ? ? ? ? ? ? ? v ref 1 2048 ? ? ? ? ? ? ? v ref 2048 2048
MAX551/max552 __________applications information output amplifier for best linearity, terminate out and gnd at exactly 0v. in most applications, out is connected to an inverting op amp? summing junction. the amplifier? input offset voltage can degrade the dac? linearity by causing out to be terminated to a nonzero voltage. the resulting error is: error voltage = v os (1 + r fb / r o ) where v os = is the op amp? offset and r o is the dac? output resistance, which is code dependent. the maximum error voltage (r o = r fb ) is 2v os ; the minimum error voltage (r o = ) is v os . to minimize this error, use a low-offset amplifier such as the max4166 (unipolar output) or the max427 (bipolar out- put). otherwise, the amplifier offset must be trimmed to zero. a good guide rule is that v os should be no more than 1/10lsb. the output amplifier? input bias current (i b ) can also limit performance, since i b x r fb generates an offset error. choose an op amp with an i b much less than (e.g., one-tenth) the dac? 1lsb output current (typi- cally 111na when v ref = 5v, and 55.5na when v ref = 2.5v). offset and linearity can also be impaired if the output amplifier? noninverting input is grounded through a bias-current compensation resistor. this resistor adds to the offset at this pin and thus should not be used. for best performance, connect the nonin- verting input directly to ground. in static or dc applications, the output amplifier? char- acteristics are not critical. in higher speed applications in which either the reference input is an ac signal or the dac output must quickly settle to a new pro- grammed value, the output op amp? ac parameters must be considered. a compensation capacitor, c1, may be required when the dac is used with a high-speed output amplifier. the purpose of the capacitor is to cancel the pole formed by the dac output capacitance, c out , and the internal feedback resistor, r fb . its value depends on the type of op amp used but typically ranges from 14pf to 30pf. too small a value causes output ringing, while excess capacitance overdamps the output. c1? size can be minimized and the output voltage settling time improved by keeping the circuit-board trace short and stray capacitance at out as low as possible. single-supply operation reference voltage the MAX551/max552 are true 4-quadrant dacs, mak- ing them ideal for multiplying applications. the refer- ence input accepts both ac and dc signals within a voltage range of ?v. the r-2r ladder is implemented with thin-film resistors, enabling the use of unipolar or bipolar reference voltages with only a single power supply for the dac. the voltage at the v ref input sets the dac? full-scale output voltage. if the reference is too noisy, it should be bypassed to gnd (agnd on the 10-pin ?ax package) with a 0.1? ceramic capacitor located as close to the ref pin as possible. voltage mode (MAX551) the MAX551 can be conveniently used in voltage mode, single-supply operation with out biased at any voltage between gnd and v dd . out must not be allowed to go 0.3v lower than gnd or 0.3v higher than v dd . otherwise, internal diodes turn on, causing a high current flow that could damage the device. figure 5 shows the MAX551 connected as a voltage output dac. in this mode of operation, the out pin is connected to the reference-voltage source, and the gnd pin is connected to the pcb ground plane. the dac output now appears at the ref pin, which has a constant resistance equal to the reference input resis- tance (11k ? typ). this output should be buffered with an op amp when a lower output impedance is required. the rfb pin is not used in this mode. the reference input (out) impedance is code dependent, and the circuit? response time depends on the reference source? behavior with changing load conditions. +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package 10 ______________________________________________________________________________________ +5v ref gnd din out v dd sclk load reference voltage v out MAX551 figure 5. single-supply, voltage mode operation
an advantage of voltage mode operation is that a neg- ative reference is not required for a positive output. note that the reference input (out) must always be positive and is limited to no more than 2v when v dd is 5v. the unipolar and bipolar circuits in figures 3 and 4 can be converted to voltage mode. current mode figure 6 shows the MAX551/max552 in a current out- put configuration in which the output amplifier is pow- ered from a single supply, and agnd is biased to 1.23v. with 0v applied to the ref input, the output can be programmed from 1.23v (zero code) to 2.46v (full scale). with 2.45v applied to ref, the output can be programmed from 1.23v (zero code) to 0.01v (full scale). the max4166 op amp that drives agnd maintains the 1.23v bias as agnd? impedance changes with the dac? digital code, from high impedance (zero code) to 7k ? minimum (full scale). using an ac reference in applications where reference voltage has ac signal components, the MAX551/max552 have multiplying capability within the reference input range of ?v. if the dac and the output amplifier are operated with a single supply voltage, then an ac reference input can be off- set with the circuit shown in figure 7 to prevent the dac output voltage from exceeding the output amplifi- er? negative output rail. the reference input? typical -3db bandwidth is greater than 700khz, as shown in the typical operating characteristics graphs. offsetting agnd the MAX551/max552 provide separate agnd and gnd inputs in the ?ax package. with this package, agnd can be biased above gnd to provide an arbi- trary nonzero output voltage for a ??input code (figure 8). layout, grounding, and bypassing bypass v dd with a 0.1? capacitor, located as close to v dd and gnd as possible. the ground pins (agnd and gnd) should be connected in a star configuration to the highest quality ground available, which should be located as close to the MAX551/max552 as possible. since out and the output amplifier? noninverting input are sensitive to offset voltage, nodes that are to be grounded should be connected directly to a single- point ground through a separate, low-resistance (less than 0.2 ? ) connection. the current at out and agnd varies with input code, creating a code-dependent error if these terminals are connected to ground (or vir- tual ground) through a resistive path. parasitic coupling of the signal from ref to out is an error source in dynamic applications. this coupling is normally a function of board layout and pin-to-pin pack- age capacitance. minimize digital feedthrough with guard traces between digital inputs, ref, and out pins. MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package ______________________________________________________________________________________ 11 v dd ref 10k ? ac reference input +5v (+3v) 10k ? out gnd MAX551 max552 max4166 ( ) are for max552 rfb v dd v out ref +5v (+3v) out out 106m ? adj dgnd c1 +1.43v to +12.6v agnd MAX551 max552 max6160 ( ) are for max552 max4167 max4167 figure 7. single-supply ac reference input circuit figure 6. single-supply, current mode operation
MAX551/max552 +3v/+5v, 12-bit, serial, multiplying dacs in 10-pin max package the MAX551/max552 have high-impedance digital inputs. to minimize noise pickup, tie them to either v dd or gnd when they are not in use. as a good practice, connect active inputs to v dd or gnd through high- value resistors (1m ? ) to prevent static charge accumu- lation if the pins are left floating, such as when a circuit card is left unconnected. the clr input on the ?ax device has an internal pull- up resistor with a typical value of 125k ? . if the clr input is not used, tie it to v dd to minimize supply current. v dd v bias v in agnd ref out gnd MAX551 max552 figure 8. agnd bias current _ordering information (continued) ___________________chip information transistor count: 887 substrate connected to v dd part max552 acpa max552bcpa max552acub 0? to +70? 0? to +70? 0? to +70? temp range pin- package 8 plastic dip 8 plastic dip 10 ?ax max552bcub max552aepa max552bepa -40? to +85? -40? to +85? 0? to +70? 10 ?ax 8 plastic dip 8 plastic dip max552aeub -40? to +85? 10 ?ax max552beub -40? to +85? 10 ?ax linearity (lsb) ?/2 ? ?/2 ? ?/2 ? ?/2 ? maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information for the latest package outline information, go to www.maxim-ic.com/packages .

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